02
Engineering Work

Projects

Project Description

Our capstone project was a low-cost distillation monitoring system designed to improve safety in small-scale distillation. The goal was to detect the transition between alcohol phases in real time so users would not have to rely on subjective methods such as smell, taste, or discarding a fixed volume. By combining sensing, flow monitoring, and temperature control, we developed a proof-of-concept system that made the distillation process more measurable, repeatable, and safety-focused.

Course ENGR 499
Team 6 Members
Duration Sept 2025 – Apr 2026
Role Software, testing, and deliverables

Why This Project Matters

During distillation, methanol is naturally produced as a byproduct of fermentation, particularly in fruit-based alcohols. While small amounts are unavoidable, methanol is highly toxic to humans. When ingested, it is metabolized into harmful compounds such as formic acid, which can cause symptoms including headaches, dizziness, and nausea. In more severe cases, methanol exposure can lead to blindness, organ failure, and even death. What makes it especially dangerous is that symptoms are often delayed, meaning individuals may not realize the severity of exposure until significant damage has occurred.

In small-scale distillation, separating methanol from usable alcohol is often done using subjective methods such as smell, taste, or fixed volume estimates. This can lead to inconsistent results and serious safety risks. This project addresses that gap by introducing a more reliable and accessible approach, using sensors to monitor the process in real time.

Click to view full code for sensors on GitHub →
Full prototype distillation setup
Fig 1. Full prototype setup showing the integrated still, sensing hardware, and supporting components used during system testing.
Temperature control module
Fig 2. Temperature control module used to monitor operating conditions and regulate cooling water for more stable system performance.
Methanol sensing module
Fig 3. Methanol sensing module based on the MTCH9010 evaluation board, used to investigate indirect detection through capacitive and conductive behavior.
Phase 01 — Define

Identifying the Problem

We began by focusing on a safety problem in small-scale distillation where methanol is a toxic byproduct, yet many users still depend on informal judgment methods to separate it from usable output. Our objective was to create a safer and more accessible alternative that could monitor the process in real time. From the beginning, the project had to balance three competing priorities: affordability, usability, and reliable sensing.

Phase 02 — Ideate

Exploring and Selecting a Sensing Strategy

We explored several possible approaches for methanol detection, including more direct analytical methods, but many were too expensive, complex, or impractical for a low-cost prototype. Our final direction used capacitive and conductive sensing with flow measurement to infer alcohol phase changes indirectly. Rather than pursuing the most precise laboratory method, we selected an approach that better aligned with the project's cost and accessibility goals.

Phase 03 — Build

Iterating the Prototype

The most important part of the project was iteration. Early versions of the sensing chamber introduced air bubbles, unstable readings, and inconsistent liquid contact with the sensors. To address this, we repeatedly redesigned the P-trap geometry to improve flow behavior and sensor submersion. My contributions focused on software, testing support, and project deliverables — translating test results into clearer system improvements and documenting design decisions throughout the process.

Phase 04 — Validate

Testing, Results, and Limitations

The final prototype demonstrated that alcohol phase transitions could be tracked in real time using combined sensor outputs and controlled operating conditions. The system achieved temperature accuracy within ±1°C. Because legal constraints prevented validation with actual methanol-ethanol distillation, we used isopropyl alcohol as a substitute during testing. This limited full real-world validation, but the project still demonstrated that the concept was feasible and worth further refinement.

±1°C
Temperature Accuracy
System testing showed accurate temperature measurement and stable control close to operating requirements.
6+
Design Iterations
Repeated redesign of the sensing chamber and control strategy improved reliability, manufacturability, and flow stability.
$298.59
Prototype Cost
The proof-of-concept exceeded the original affordability target, highlighting cost reduction as an important area for future development.

Project Description

Designed a 2-bit flash analog-to-digital converter (ADC) in 130 nm CMOS, targeting 1 GHz operation. The project covered full transistor-level architecture: strong-arm latch dynamic comparators, a 1 V reference resistor ladder, and CMOS encoder logic. All blocks were implemented and verified individually in Cadence Virtuoso before full system integration.

Tool Cadence Virtuoso
Process 130 nm CMOS
Year 2026
Area Analog IC Design
Resolution
2-bit
Target Speed
1 GHz
Process Node
130 nm CMOS
Reference Voltage
1 V
Comparator Type
Strong-arm latch
Encoder Logic
CMOS
Block 01

Comparator Design

The core sensing element is a strong-arm latch dynamic comparator, chosen for its low static power and suitability for high-speed operation. Three comparators are required for a 2-bit flash ADC (2ⁿ − 1). Each comparator was sized at the transistor level and characterized individually for offset, propagation delay, and output swing before integration into the full array.

Block 02

Reference Ladder

A resistor-ladder network generates evenly spaced reference voltages between 0 V and 1 V. Resistor sizing was chosen to balance current consumption against the settling time requirements at 1 GHz operation, with analysis of how resistor mismatch and capacitive loading at each tap affect overall linearity.

Block 03

CMOS Encoder Logic

The thermometer-code output of the comparator array is converted to a 2-bit binary output using CMOS combinational logic. Gate-level design was verified for correct truth-table behavior, and the encoder's contribution to total propagation delay was analyzed as part of the overall timing budget.

Analysis

Trade-off Study

A key part of the project was analyzing performance trade-offs at 1 GHz: comparator input-referred offset and its effect on DNL/INL, non-ideal output swing under capacitive loading, power consumption scaling, and sensitivity to process variation in 130 nm CMOS. This analysis grounded design decisions in realistic operating constraints rather than ideal assumptions.

1 GHz
Target Sample Rate
Targeted high-speed operation in 130 nm CMOS, requiring careful timing budget analysis across all blocks.
3
Comparators Designed
Each strong-arm latch comparator was individually sized, characterized, and verified before system integration.
Full
Block-Level Verification
Comparator, reference ladder, and encoder were each verified independently in Cadence Virtuoso before integration.